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AD7741/AD7742
AD7742–SPECIFICATIONS (V T
B Version 1
DD
MAX
= +4.75 V to +5.25 V; V REF = +2.5 V; f CLKIN = 6.144 MHz; all specifications T MIN to
unless otherwise noted.)
Y Version 2
Parameter 3
Min
Typ
Max
Min
Typ
Max
Units
Conditions/Comments
DC PERFORMANCE
Integral Nonlinearity
f CLKIN = 200 kHz 4
f CLKIN = 3 MHz 4
f CLKIN = 6.144 MHz
Offset Error
± 0.0122
± 0.0122
± 0.0122
± 40
± 40
± 0.015
± 0.015
± 0.015
± 40
± 40
% of Span 5
% of Span
% of Span
mV
mV
Unipolar Mode
Bipolar Mode
Gain Error
Offset Error Drift 4
Gain Error Drift 4
Power Supply Rejection Ratio 4
Channel-to-Channel Isolation 4
+0.2
+0.2
+1.2
+1.2
± 12
± 12
± 2
± 4
–70
–75
+2.2
+2.2
+0.2
+0.2
+1.2
+1.2
± 12
± 12
± 2
± 4
–70
–75
+2.2
+2.2
% of Span
% of Span
μ V/ ° C
μ V/ ° C
ppm of Span/ ° C
ppm of Span/ ° C
dB
dB
Unipolar Mode
Bipolar Mode
Unipolar Mode
Bipolar Mode
Unipolar Mode
Bipolar Mode
? V DD = ± 5%
Common-Mode Rejection
–60
–78
–58
–78
dB
ANALOG INPUTS (V IN 1–V IN 4) 6
Input Current
Common-Mode Input Range
+0.5
± 50
± 100
V DD – 1.75 +0.5
± 50
± 100
V DD – 1.75
nA
V
Differential Input Range
–V REF /Gain
0
+V REF /Gain –V REF /Gain
+V REF /Gain 0
+V REF /Gain
+V REF /Gain
V
V
Bipolar Mode
Unipolar Mode
VOLTAGE REFERENCE
REFIN
Nominal Input Voltage
Input Impedance 4
f CLKIN = 3 MHz
f CLKIN = 6.144 MHz
70
35
2.5
70
35
2.5
V
k ?
k ?
REFOUT
Output Voltage
Output Impedance 4
Reference Drift 4
2.38
2.50
1
± 50
2.60
2.38
2.50
1
± 50
2.60
V
k ?
ppm/ ° C
Line Rejection
Reference Noise
(0.1 Hz to 10 Hz) 4
–70
100
–70
100
dB
μ V p-p
LOGIC OUTPUT
Output High Voltage, V OH
Output Low Voltage, V OL
Minimum Output Frequency
4.0
0.05 f CLKIN
0.4
4.0
0.05 f CLKIN
0.4
V
V
Hz
Output Sourcing 800 μ A 7
Output Sinking 1.6 mA 7
V IN = 0 V (Unipolar), V IN =
–V REF /Gain (Bipolar)
Maximum Output Frequency
0.45 f CLKIN
0.45 f CLKIN
Hz
V IN = V REF /Gain (Unipolar
and Bipolar)
LOGIC INPUT
ALL EXCEPT CLKIN
Input High Voltage, V IH
Input Low Voltage, V IL
Input Current
2.4
0.8
± 100
2.4
0.8
± 100
V
V
nA
Pin Capacitance
6
10
6
10
pF
CLKIN ONLY
Input High Voltage, V IH
Input Low Voltage, V IL
Input Current
3.5
0.8
± 2
3.5
0.8
± 2
V
V
μ A
Pin Capacitance
6
10
6
10
pF
CLOCK FREQUENCY
Input Frequency
6.144
6.144
MHz
For Specified Performance
POWER REQUIREMENTS
V DD
4.75
5.25
4.75
5.25
V
I DD (Normal Mode)
I DD (Power-Down)
Power-Up Time 4
6
25
30
8
35
6
25
30
8
35
mA
μ A
μ s
Output Unloaded
Coming Out of Power-
Temperature range: B Version: –40 ° C to +85 ° C.
Temperature range: Y Version: –40 ° C to +105 ° C.
See Terminology.
Down Mode
N OTES
1
2
3
4
5
6
7
Guaranteed by design and characterization, not production tested.
Span = Maximum Output Frequency–Minimum Output Frequency.
The absolute voltage on the input pins must not go more positive than V DD – 1.75 V or more negative than +0.5 V.
These logic levels apply to CLKOUT only when it is loaded with one CMOS load.
Specifications subject to change without notice .
REV. 0
–3 –
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